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Bugtraq archives for 4th quarter (Oct-Dec) 1997: Re: Intel Pentium Bug

Re: Intel Pentium Bug

Ralf Baechle (ralfMAILHOST.UNI-KOBLENZ.DE)
Mon, 10 Nov 1997 16:27:48 +0100 

On Sat, Nov 08, 1997 at 03:34:01AM -0200, Rubens Kuhl Jr. wrote:
> A possible architeture is a shadow RAM mechanism, in which microcode is
> stored in ROM and shadowed during power-up to a static RAM area in the
> chip.
> This could make Pentium upgradable by the host OS every time it boots
> up, and it would come at no cost if this was introduced to speed-up
> execution.
>
> (RAM and ROM above refers to electronic blocks at the processor core,
> not to their chip-size counterparts)
>
> Just to mention, Digital Alpha processors has some of the instruction
> range microcode-loadable, and this is used to taylor the instructions to
> the operating system it's running: VMS, Unix or NT.

The feature you're talking about, PAL code (Programmable Architecture
Library) is not comparable with microcode.  The PAL code is CPU, system
and OS dependand and resides in the main memory.  In what I can do and
how it is implemented it is probably most similar to a MIPS CPU with
ERL or EXL bits set in the status register.  All in all the concept isn't
nearly as innovative as Digital tries to make it look.

The only really new thing with PAL code is that it is a separate software
layer between CPU and OS that is standard part of every Alpha machine.
In effect it's a nice way that allows them to modify the PAL-code only
visible part of the CPU without breaking the operating systems ... and
hide a lot of the bugs of the silicon that the OS software on other
CPUs has to handle explicitly.  Not to mention that Digital only promotes
the first part of the medal ...

  Ralf