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NFR Wizards Archive: Brute force & building the machines

Brute force & building the machines


Adam Shostack (adamhomeport.org)
Sat, 20 Jun 1998 07:38:41 -0400 (EDT)


Regarding the existance of brute force machines. The other player,
AFAIK, is jumping straight to ASIC.

Adam

----- Forwarded message from staymaccessdata.com -----

>From coderpunks-errorstoad.com Fri Jun 19 19:47:15 1998
>From: staymaccessdata.com
X-Authentication-Warning: accessdata.com: Host 205-162-177-42.core1.itsnet.com [205.162.177.42] claimed to be Abraham.accessdata.com
Message-ID: <358AF94C.4B2accessdata.com>
Date: Fri, 19 Jun 1998 17:50:36 -0600
Reply-To: staymaccessdata.com
X-Mailer: Mozilla 3.04Gold (Win95; I)
To: coderpunkstoad.com
Subject: Re: PD tools for FPGA's/PLD's (Was: ASIC price/volume/performance)
References: <413AC08141DBD011A58000A0C924A6D51CF437MVS2>
Sender: owner-coderpunkstoad.com
Precedence: bulk

One thing that has been missing from this discussion of prices are
engineering costs, chip glue, power cords, interfacing, etc., which
actually adds a great deal to the overall cost.

AccessData is building a massively parallel computer to break Word &
Excel documents (and DES for kicks) out of FPGA's and DSP's; the
estimates on the 40-bit RC4/MD5 authentication MS uses are
~20,000 keys/sec/chip, with 64 chips per box, or ~1.3 million
keys/box/sec. The boxes will cost $6-8K, depending on the chip and
quantities.

For DES, we'll only be at ~1.2 billion keys/box/sec; we're hoping that
once we have this proof-of-concept (i.e. the parallel processing boxes)
and all that overhead taken care of, someone will foot the bill for
developing the ASIC chip (1000% faster, at least) and we can
plug-'n-play :-)

-- 
Mike Stay
Cryptographer / Programmer
AccessData Corp.
mailto:staymaccessdata.com

----- End of forwarded message from staymaccessdata.com -----

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"It is seldom that liberty of any kind is lost all at once."
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