From: Miod Vallat (miodcvs.openbsd.org)
Date: Wed Dec 26 2007 - 16:21:42 CST

• Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

CVSROOT: /cvs
Module name: src
Changes by: miodcvs.openbsd.org 2007/12/26 15:21:42

Modified files:
        sys/arch/m88k/m88k: m88k_machdep.c
        sys/arch/mvme88k/mvme88k: m197_machdep.c m88110.c

Log message:
Remove the last debug bit from the PSR on 88110: do not force memory accesses
instructions to be serialized (this defeats the purpose of having a superscalar
processor, and accesses to volatile variables are done with explicit memory
barriers anyway).

This brings a HUGE speedup: openssl speed -elapsed shows AES is 90% faster,
blowfish is 75% faster, and sha1 is 50% faster. Not so bad!

However, doing this increases the pressure on the processor bus, so it is
necessary to increase the processor bus timeout on 40MHz boards again (to 256
usec). ``black cat'' 50MHz boards seem to be unaffected, so they remain at
64 usec.

• Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]